This quarterly EasylogicECO product training will be provided on (Tue) January 23, 2024. The training aims to help customers better utilize Easy-Logic Technology's Engineering Change Order (ECO) solution, understand new product features and maximize ECO design efficiency.  

During the training, EasylogicECO technical expert will answer any questions you may have and offer design recommendations for addressing different application challenges.

Training schedule

Training coverage

Section 1  Basic Product Features  

Time: 10:00-12:00 (Beijing Standard Time)

Contents:

Chapter 1:  Solution Offerings

Chapter 2:  Unique Optimization Capabilities

Chapter 3:  File Naming Convention

Chapter 4:  Script Configuration File

Chapter 5:  Running ECO scripts

Chapter 6:  Scan Chain ECO

Chapter 7:  Metal ECO

Section 2  Advanced Product Features 

Time: 14:00-15:00 (Beijing Standard Time)

Contents:

Chapter 1:  Modeling Asynchronous Registers

Chapter 2:  Commands to Specify CG cells

Chapter 3:  Remove CG for Timing

Chapter 4:  Naming Rules of Multibit Register

Chapter 5:  Naming Rules of EasylogicECO

Chapter 6:  Second ECO Flow

Chapter 7:  Learning ECO Flow

Chapter 8:  LowPowerECO

Notes: The training includes both sections.  Please register for the section you need. 

Registration

This training is provided free of charge.  Please contact your Easy-Logic Technology account manager to obtain the login code.

Instructor

Kager Tsai        Vice President of Technical Support at Easy-Logic Technology

Kager joined Easy-Logic Technology in 2021 and has led his team to provide high-quality technical support to domestic and foreign users, forming a complete service system and accumulating valuable application knowledge and experience.

Kager has 18 years of experience in the CAD industry and has worked for companies such as SiS, MStar, MTK, and Cadence. He is proficient in the ASIC front-end tool flow, especially in formal verification and ECO-related applications. Kager also participated in the development of many advanced features of EasylogicECO, and assisted numerous customers in successfully implementing ECO design processes in their design environments.

Kager holds a Master's degree in Electrical Engineering from National Central University.

Allen Guo         Senior engineer at Easy-Logic Technology

Allen joined Easy-Logic Technology in 2023 and is responsible for providing customer support in the North American market, ensuring successful completion of ECO projects.

With a wealth of industry experience spanning over 20 years, Allen previously served as a principal engineer at Broadcom from 2004 to 2014, leading the design flow of seven chips and overseeing the creation and maintenance of the company's entire middle and back end processes. From 2015 to 2022, he joined Microsoft AI Chip Group where he was accountable for developing and maintaining chipset tools and processes. In 2022-2023, Allen worked at Cadence specializing in client-specific middle and back end process design. His expertise extends across various process nodes ranging from 250nm to 2nm.

Allen holds a master's degree in electrical engineering from Santa Clara University.

For additional training information, please contact us at info@easylogiceda.com. Please set the email subject as "product training + your company name" for a speedy reply. We look forward to seeing you during the training.